Describe a circuit in English — SchGen writes executable Python that builds the KiCad schematic for you. Test points, solder jumpers, LDOs, buck converters, MCU support: it's all code.
Pick a circuit request below — each one is the kind of natural-language input SchGen was trained on, paired with the executable schematic-generation code it outputs. Code targets SchGen's custom KiCad schematic API (parts, pins, nets, wires, labels, power flags, test points, solder jumpers).
Copy this prompt and try it against the model on your own hardware once live inference lands.
SchGen turns a design requirement into an editable, programmatic schematic — not a rendered image.
Write a natural-language requirement: regulators, connectors, crystals, test points, or what you want on each rail.
SchGen emits executable Python using schematic-generation APIs — parts, pins, nets, wires, labels, power flags.
Run the script to construct the schematic. Because it's code, it stays fully editable and version-controllable.
Run ERC / DRC checks and a human engineering review — especially before anything safety-critical.
SchGen is a supervised fine-tune of GPT-OSS-20B on ~8K paired circuit requests and schematic-generation code samples. It's built for small/medium schematic modules and hobbyist–open-source hardware.
| Base model | GPT-OSS-20B |
|---|---|
| Adapter | LoRA r=8 · α=16 (attention + selected experts) |
| Parameters | 20B MoE · ~3.6B active |
| Input | Natural-language design requests |
| Output | Executable Python schematic-generation code |
| Context length | 13,312 tokens |
| Training data | ~8K curated pairs |
| Training | 1× NVIDIA A100 · ~21 h |
| License | MIT |
Evaluated on valid circuits (code executes & produces a valid schematic), spatial violations (symbol/label/wire overlaps), and netlist accuracy (connectivity vs. ground truth). SchGen outperforms frontier-LLM baselines given the same schematic APIs.
Works best on small/medium modules and English requests. It underperforms on RF/high-frequency, industrial, and large multi-board designs. Generated outputs should always pass ERC/DRC and human review — SchGen is an assistive tool, not an autonomous hardware engineer.
The model is a LoRA adapter on top of GPT-OSS-20B. Load it in a few lines and generate your own schematics.
from transformers import AutoModelForCausalLM, AutoTokenizer
from peft import PeftModel
base = AutoModelForCausalLM.from_pretrained(
"openai/gpt-oss-20b", device_map="auto"
)
model = PeftModel.from_pretrained(base, "microsoft/SchGen")
tok = AutoTokenizer.from_pretrained("microsoft/SchGen")
prompt = tok.apply_chat_template(
[{"role": "user", "content": "I want a 1.8V regulated supply from VIN \
using an AP2112K LDO, with a test point on the 1.8V rail and a \
solder-jumper-selectable LED indicator."}],
tokenize=False, add_generation_prompt=True,
)
out = model.generate(
**tok(prompt, return_tensors="pt").to(model.device),
max_new_tokens=1024, do_sample=True, temperature=0.3,
)
print(tok.decode(out[0], skip_special_tokens=True))
Requirements: Python, PyTorch, Transformers, PEFT, and — to render what it generates — KiCad plus the custom schematic APIs. Inference was validated on NVIDIA A100 (including 4-bit quantized configurations).